J-Link V8 JLink Segger ARM Emulator Debugger


Features
•Direct download into flash memory of most popular microcontrollers supported
•Supported CPUs: Any ARM7/9/11, Cortex-A5/A8/A9, Cortex-M0/M1/M3/M4, Cortex-R4, RX610, RX621, RX62N, RX62T, RX630, RX631, RX63N
•Download speed up to 800 Kbytes/second
•Supports unlimited breakpoints in flash memory1 
•Supported by all major IDEs
•Free software updates2
•Supports concurrent access to CPU by multiple applications3
•Crossplatform support (runs on Windows, Linux, Mac OS X)4
•Intelligence in the emulator firmware 
•TCP/IP server included. Allows using J-Link remotely via TCP/IP 
•GDBServer included 
•Production flash programming software (J-Flash) available 
•Software Developer Kit (SDK) available 
•Supports multiple target interfaces: JTAG, SWD
•Supports SWV/SWO (Serial Wire Viewer / Serial wire output)
•Wide target voltage range: 1.2V - 3.3V, 5V tolerant
•Supports JTAG chains with multiple devices
•Embedded Trace Buffer (ETB) support
•Various target adapters available, including optical isolation adapter. 
•RDI interface DLL available. 
•Fully plug and play compatible
•No power supply required, powered through USB
•Support for adaptive clocking
•All JTAG signals can be monitored, target voltage can be measured
•Target power supply: J-Link can supply up to 300 mA to target with overload protection
1 The unlimited breakpoints in flash memory feature can be used free of charge for evaluation. The evaluation period is not time limited. For commercial use a separate license is required.
2 As a legitimate owner of a SEGGER J-Link, you can always download the latest software free of charge. Though not planned and not likely, we reserve the right to change this policy. Note that at older models may not be supported by newer versions of the software. Typically, we support older models with new software at least 3 years after end of life.
3 J-Link allows multiple applications to access a CPU at the same time. This has numerous applications. J-Link commander can be used in parallel to a debugger, a tool to communicate via DCC can be used in parallel to a debugger or a visualisation tool such as Micrium's u/C-Probe or SEGGER's kernel viewer embOSView. This feature is currently not available for Cortex A and R cores.
4 The MAC and Linux versions are fully usable, but limited to the following components:
J-Link Commander, command line GDBServer, shared library (DLL-equivalent).

V8.0 improvements than V7.0:

(1) improving the SWD interface circuit, the use of counterfeit JLINK V8 JTAG debug debug mode can be normal
when debugging CORTEX-M3 core chips will not use SWD functionality
V7 hardware SWD part with the V8 not the same, if forced to switch to SWD mode, JLINK the main chip will be destroyed! 
JLINK V8 interface circuit using two-level converter chip, using a level converter chip will be fake V8!

(2) V8.0 using two-color LED can indicate more work status, V7.0 only an LED indicator light

(3) to optimize the firmware structure and function of the firmware upgrade bootloader area to move to double the size of the application area
 Easy to add new features;

(4) support for ARM11 better and faster than JLINK V7, is the first choice for ARM11. 
 

Other differences:

1) J-Link V8 use AT91SAM7S64, expanding the capacity of Flash and SRAM to facilitate future upgrades;

2) J-Link V8 improves the SWD interface, an increase of driver chips, 
(V6 and V7 in the SWD is a direct quote from the pin to the target CPU board); 

3) J-Link V8 SWD improved control methods, V7 is the I / O direct-drive, V8 with a special method, there is not effective anyway V8's SWD velocities slower than the V7

4) J-LinkV8 have three lights, one directed USB Communications, a direct target CPU, reset state, a direct 5V output is turned on V7 only 1 USB communication indicator

5) J-Link V8's firmware update process is not DLL, and can not write the same as V7 Bootloader on a simple easy to crack V8's Bootloader need to implement USB device connectivity;

Products Introduce 
J-Link emulation is SEGGER company ARM core chip to support the launch of the JTAG emulator.
With the IAR EWARM, ADS, KEIL, WINARM, RealView and other integrated development environment supports all ARM7/ARM9 core chip simulation
Through RDI interface and the integrated development environment for seamless connectivity, easy, convenient connections
Easy to learn, is learning and developing ARM best and most practical development tools.

J-Link ARM Features: 
* IAR EWARM integrated development environment seamlessly connected JTAG Emulator 
* Support all ARM7/ARM9 core chips, as well as cortex M3, including Thumb mode 
* Support for ADS, IAR, KEIL, WINARM, REALVIEW almost all of the development environment 
* Download speeds of up to ARM7: 600kB / s, ARM9: 550kB / s, through the DCC up to 800 kB / s 
* The maximum JTAG speed 12 MHz 
* Target board voltage range 1.2V-3.3V, 5V compatible 
* Auto speed recognition 
* Monitoring all JTAG signals and target board voltage 
* Fully plug and play 
* Use the USB power supply (but not the target board power supply) 
* With a USB cable and 20-core flat cable 
* Support multi-device JTAG serial connection 
* Standard 20-core JTAG emulation connector 
* Optional 14-core JTAG emulation connector 
* Optional adapter for 5V targets board 
 

J-Link support for ARM cores: 
* ARM7TDMI (Rev 1) 
* ARM7TDMI (Rev 3) 
* ARM7TDMI-S (Rev 4) 
* ARM720T * ARM920T 
* ARM926EJ-S 
* ARM946E-S 
* ARM966E-S 
* ARM11 
* Cortex-M3

 

Specifications *

 

 

General
Supported OS Microsoft Windows 2000
Microsoft Windows XP
Microsoft Windows XP x64
Microsoft Windows 2003
Microsoft Windows 2003 x64
Microsoft Windows Vista
Microsoft Windows Vista x64
Windows 7
Windows 7 x64
Electromagnetic compatibility (EMC) EN 55022, EN 55024
Operating temperature +5��C ... +60��C
Storage temperature -20��C ... +65 ��C
Relative humidity (non-condensing) Max. 90% rH
Mechanical
Size (without cables) 100mm x 53mm x 27mm
Weight (without cables) 70g
Available Interfaces
USB interface USB 2.0, full speed
Target interface JTAG 20-pin (14-pin adapter available)
JTAG/SWD Interface, Electrical
Power supply USB powered
Max. 50mA + Target Supply current.
Target interface voltage (VIF) 1.2V ... 5V
Target supply voltage 4.5V ... 5V (if powered with 5V on USB)
Target supply current Max. 300mA
Reset Type Open drain. Can be pulled low or 
tristated.
Reset low level output voltage (VOL) VOL <= 10% of VIF
For the whole target voltage range (1.8V <= VIF <= 5V)
LOW level input voltage (VIL) VIL <= 40% of VIF
HIGH level input voltage (VIH) VIH >= 60% of VIF
For 1.8V <= VIF <= 3.6V
LOW level output voltage (VOL) with a load of 10 kOhm VOL <= 10% of VIF
HIGH level output voltage (VOH) with a load of 10 kOhm VOH >= 90% of VIF
For 3.6 <= VIF <= 5V
LOW level output voltage (VOL) with a load of 10 kOhm VOL <= 20% of VIF
HIGH level output voltage (VOH) with a load of 10 kOhm VOH >= 80% of VIF
JTAG/SWD Interface, Timing
JTAG speed Max. 12MHz
SWO sampling frequency Max. 6MHz
Data input rise time (Trdi) Trdi <= 20ns
Data input fall time (Tfdi) Tfdi <= 20ns
Data output rise time (Trdo) Trdo <= 10ns
Data output fall time (Tfdo) Tfdo <= 10ns
Clock rise time (Trc) Trc <= 10ns
Clock fall time (Tfc) Tfc <= 10ns

* J-Link hardware revision 8 and up

 

 

Package List:
1x J-Link V8 emulator 
1x 20P line of a standard JTAG 
1x USB cable
1x Download Link for Driver Software